Recent Publications

Visit our Japanese page or Prof. Tomiyama's page for a complete list of publications.

Journal Publications

  • Takahiro Yamamoto, Ittetsu Taniguchi, Hiroyuki Tomiyama, Shigeru Yamashita, Yuko Hara-Azumi, "A Systematic Methodology for Design and Worst-Case Error Analysis of Approximate Array Multipliers," IEICE Trans. on Fundamentals, vol. E100-A, no. 7, pp. 1496-1499, July 2017.
  • Yining Xu, Ittetsu Taniguchi, Hiroyuki Tomiyama, "Static Mapping of Parallelizable Tasks under Deadline Constraints," IEICE Trans. on Fundamentals, vol. E100-A, no. 7, pp. 1500-1502, July 2017.
  • Kana Shimada, Shogo Kitano, Ittetsu Taniguchi, Hiroyuki Tomiyama, "ILP-based Scheduling for Parallelizable Tasks," IEICE Trans. on Fundamentals, vol. E100-A, no. 7, pp. 1503-1505, July 2017.
  • Yang Liu, Lin Meng, Ittetsu Taniguchi, and Hiroyuki Tomiyama, "A Dual-Mode Scheduling Approach for Task Graphs with Data Parallelism," International Journal of Embedded Systems, Inderscience Publishers, vol. 9, no. 2, pp. 147-156, April 2017.
  • Yining Xu, Yang Liu, Junya Kaida, Ittetsu Taniguchi, and Hiroyuki Tomiyama, "Static Mapping of Multiple Parallel Applications on Non-Hierarchical Manycore Embedded Systems," IEICE Trans. on Fundamentals, vol. E99-A, no. 7, pp. 1417-1419, July 2016.
  • Gang Zeng, Yutaka Matsubara, Hiroyuki Tomiyama, and Hiroaki Takada, "Energy-Aware Task Migration for Multiprocessor Real-Time Systems," Future Generation Computer Systems, Elsevier, vol 56, pp. 220-228, March 2016.

Conference Publications

  • Takahiro Yamamoto, Ittetsu Taniguchi, Hiroyuki Tomiyama, Shigeru Yamashita, Yuko Hara-Azumi, "A Systematic Methodology for Design and Analysis of Approximate Array Multipliers," In Proc. of Asia Pacific Conference on Circuits and Systems (APCCAS), pp. 352-354, Jeju, Korea, October 2016.
  • Yang Liu, Lin Meng, Ittetsu Taniguchi, Hiroyuki Tomiyama, "A Branch-and-Bound Algorithm for Scheduling of Data-Parallel Tasks," In Proc. of Workshop on Synthesis and System Integration of Mixed Information Technologies (SASIMI), pp. 96-100, Kyoto, October 2016.
  • Yining Xu, Ittetsu Taniguchi, Hiroyuki Tomiyama, "Deadline-Constrained Static Mapping of Parallelizable Tasks on Manycore Architectures," In Proc. of International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), pp. 33-36, Naha, July 2016.
  • Shunsuke Takai, Ittetsu Taniguchi, Hiroyuki Tomiyama, Sri Parameswaran, "An OpenCL Framework for FPGA-based Heterogeneous Multicore Architecture," In Proc. of International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), pp. 443-444, Naha, July 2016.
  • Kana Shimada, Shogo Kitano, Ittetsu Taniguchi, Hiroyuki Tomiyama, "ILP-based Scheduling for Malleable Parallel Tasks," In Proc. of International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), pp. 445-446, Naha, July 2016.
  • Shunsuke Negoro, Ittetsu Taniguchi, Hiroyuki Tomiyama, "Fundamental Analysis of Low Energy Path Routing for Delivery Quadcopters," In Proc. of International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), pp. 595-596, Naha, July 2016.
  • Muneyuki Takenae, Ittetsu Taniguchi, Hiroyuki Tomiyama, "A Case Study on Exploration of FPGA-based Multicore/Manycore Architectures," In Proc. of International Symposium on Low-Power and High-Speed Chips (COOL Chips), Poster presentation, 2 pages, Yokohama, April 2016.

Talks

  • Hiroyuki Tomiyama, "Energy Modeling and Optimization for Delivery Quadcopters," International Forum on MPSoC for Software-defined Hardware (MPSoC), Nara, July 2016.
  • Hiroyuki Tomiyama, "PUF-based Security Enhancement for Automotive Software Update," International Forum on MPSoC for Software-defined Hardware (MPSoC), Ventura, CA, USA, July 2015.

Awards

  • Best Paper Award, Shunsuke Takai, Naoki Nishiyama, Ittetsu Taniguchi, Hiroyuki Tomiyama, "A Lightweight OpenCL Framework for Embedded Multicore Processors," International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), 2015.
  • IPSJ SIG-SLDM Excellent Student Award, Naoki Nishiyama, August 2014.
  • IPSJ SIG-SLDM Excellent Student Award, Ryoya Sobue, August 2013.
  • Best Paper Award, Keita Nakajima, Takuji Hieda, Ittetsu Taniguchi, Hiroyuki Tomiyama, and Hiroaki Takada, "A Fast Network-on-Chip Simulator with QEMU and SystemC," International Workshop on Advances in Networking and Computing (WANC), 2012.